DescriptorTable( CBV(b1), SRV(t0,numDescriptors=99), CBV(b2) )Ī resource declaration may be a scalar, a 1D array, or a multidimensional array: Texture2D tex1 : register(t3, space0) For example, the following portion of a root signature would be compatible with the use of texture slots t3 through t6, as it describes a descriptor table with slots t0 through t98. The root signature referencing the shader must be compatible with the declared register slots. Direct3D 12 resources in HLSL are bound to virtual registers within logical register spaces: Shader Model 5.1 (SM5.1) resource syntax in HLSL is based on existing register resource syntax, to allow easier porting. t3 is the only register slot appearing in the statement, simply being the first in the array of four. For example, the following statement declares an array of four textures bound at slots t3, t4, t5, and t6. Shader Model 5 (SM5.0) resource syntax uses the register keyword to relay important information about the resource to the HLSL compiler. All Direct3D 12 hardware supports Shader Model 5.1, so support for this model does not depend on what the hardware feature level is. This topic describes some specific features of using High Level Shader Language (HLSL) Shader Model 5.1 with Direct3D 12.
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